The present invention relates to a buzzer drive circuit, and more particularly to a buzzer drive circuit implementing a reduction in a size of the circuit and stabilization of a buzzer output.
FIG. 2 shows a conventional buzzer drive circuit. The buzzer drive circuit comprises an IC section 13 including a logic section 14, AND gates 15 to 18, FETs 19 to 22 and terminals 23 to 28. The terminal 28 is used for controlling a buzzer output waveform. The terminal 24 is grounded. Resistors 29 to 32 for determining weighting of a current flowing in a path between the terminals 25 to 28 and the buzzer 12 are connected to the respective terminals. Each of the AND gates 15 to 18 calculates AND of an output of the logic section 14 and a control input sent from the terminal 23, and supplies the AND to gates of the FETs 19 to 22. Sources of the FETs 19 to 22 are connected to the terminal 24 in common. Drains of the FETs 19 to 22 are connected to the terminals 25 to 28.
In the buzzer drive circuit having such a structure, the FETs 19 to 22 are ON/OFF controlled according to control data transferred from the logic section 14 so that the output of the buzzer is controlled. Moreover, the buzzer output waveform is controlled in response to a signal sent to the terminal 23. More specifically, when the terminal 23 is set in an OFF state, the AND gates 15 to 18 are always set in an OFF state and the buzzer does not sound. When the terminal 23 is set in an ON state, the AND gates 15 to 18 are selected to be turned ON/OFF according to the control data. For this reason, the buzzer sounds in a cycle of the signal input to the terminal 23. These AND gates are connected to the terminals 25 to 28 through the FETs, respectively. Therefore, the FETs are ON/OFF controlled depending on the ON/OFF of the AND gates, thereby opening or closing the paths reaching the terminals 25 to 28. Furthermore, the resistors 29 to 32 for determining the weighting of the current flowing to the respective paths are connected to the terminals 25 to 28, and the buzzer output is controlled by opening or closing the paths reaching the same terminals.
In FIG. 2, the number of data bits for buzzer output control is four, and the parts provided in the IC section 13 include four AND gates and four FETs in the same manner as the control data bits. Thus, the total number of the parts is eight. Moreover, the number of the terminals is six, that is, the terminal 23 for the ON/OFF control of the buzzer section, the terminal 24, and the terminals 25 to 28 connected to the drains of the FETs 19 to 22 respectively. Furthermore, it is necessary to provide four parts outside the IC other than the buzzer, that is, the resistors 29 to 32 for determining the weighting of the current flowing to the respective paths are required for the terminals 25 to 28.
In the conventional circuit structure, however, a path including an AND gate and an FET is provided corresponding to the number of bits of the control data transferred from the logic section. For this reason, when the number of bits of the control data is increased to enhance precision in buzzer control, the number of paths reaching the buzzer and the numbers of parts and terminals in the IC section are increased. Furthermore, a resistor to be externally provided is required for each terminal so that the number of parts to be externally provided is also increased. Moreover, paths are provided from the logic section to the terminals 25 to 28 in the IC section. Therefore, the buzzer output is influenced by the paths due to a variation in a value of the resistor connected to each terminal. Furthermore, the buzzer output is controlled under the control of an operation for opening/closing the paths to the terminals 25 to 28. Therefore, the output is affected by a change in an operating environment such as a temperature or a noise.
The invention has been made to solve the conventional problems and has an object to provide a buzzer drive circuit which can reduce a size of the circuit, can relieve the influence of a path on a buzzer output and can enhance stability of the buzzer output, and does not depend on the number of bits of control data.
A buzzer drive circuit according to the invention comprises: a buzzer output control voltage generator which generates a voltage corresponding to buzzer output control data; a transistor for buzzer output waveform control, in which a control signal of a buzzer output waveform is applied to a gate; and a transistor for buzzer output control in which an output of the buzzer output control voltage generator and an output of the transistor for buzzer output waveform control are applied to a gate. By such a structure, the voltage corresponding to the buzzer output control data which is generated by the buzzer output control voltage generator can be applied to the gate of the transistor for buzzer output control to control the buzzer output, and the output of the transistor for buzzer output waveform control can be applied to the gate of the transistor for buzzer output control, thereby controlling the buzzer output waveform. Therefore, it is possible to implement a circuit structure which can reduce the size of the buzzer drive circuit, can relieve the influence of the path on the buzzer output and does not depend on the number of bits of the control data.
Moreover, the buzzer output control voltage generator includes: a variable power supply for changing an output voltage in accordance with buzzer output control data transferred from a logic section; and an operational amplifier in which an output of the variable power supply is applied to a non-inverted input terminal and a negative feedback output of the transistor for buzzer output control is applied to an inverted input terminal. By such a structure, the stability of the buzzer output can be enhanced.